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C-DAC Could Leapfrog To Front Rank Of Supercomputer Chip Race With The Aum Processor

  • The government computer tech lab, C-DAC, has commenced development of a processor that could fuel an Exascale supercomputer.
  • This will when completed, place it among a handful of nations capable of delivering this level of high performance computing hardware.
  • Meanwhile C-DAC has invited private partners for the licensed production of India’s first multi-core Vega processor family for which it has developed all the intellectual property.

Anand ParthasarathyMay 24, 2023, 02:33 PM | Updated 02:33 PM IST
C-DAC has set its sights on advanced supercomputer-class microprocessors.
(Representative image) (Image  Credit: C-DAC)

C-DAC has set its sights on advanced supercomputer-class microprocessors. (Representative image) (Image Credit: C-DAC)


The Centre for Development of Advanced Computing (C-DAC) is known to be working on an advanced Supercomputing-class processor, arguably the most advanced and technologically complex semiconductor chip development to be undertaken in India.

Undertaken as part of the National Supercomputing Mission, the processor chip named 'Aum' (in the Sanskrit), will have 64 core or computing elements, divided into two chiplets of 48 cores each. The onboard memory is 64 GB.

The software to fuel the chip is being indigenously developed and leverages the Open Source ecosystem. It is designed to be fabricated using 5 nanometre technology which is in the ballpark of contemporary commercial microprocessors and typically accommodates 150-300 million transistors on every square millimeter. 

A fab to manufacture chips to 5 nanometer standards does not exist in India — so initially at least Aum will need to be manufactured abroad.

Aum is expected to deliver over 4.7 teraflops or 4.7 trillion computer operations per second  called FLOPs at each of the chip's two sockets.

Inside the Aum processor

The processor is currently scheduled for availability in 2024 and should help India develop an exascale supercomputing platform.

An exaflop is one quintillion  FLOPs or one followed by 18 zero FLOPs or 1000 PetaFlops. The pilot system, however, will aim to fuel a computer in the petaflop range.

The world’s fastest supercomputer today, the US department of Energy’s “Frontier” is the only exascale machine today and clocks 1.102 exaFLOPs – so the Aum is a daring bid to create the building blocks which could help India leapfrog to the top of the supercomputing league.

Rationale for Aum

Sanjay Wandhekar Senior Director C-DAC, and Head of the department of High Performance Computing Technologies in a presentation at the first public announcement of this project two years ago, had laid out the motivation for India to develop her own supercomputing-class processor:

  • The processor architecture will benefit both critical High Performance  Computing  (HPC) applications as well as  serving General Purpose Computing (GPC)  needs.

  • It will achieve Energy efficiency thanks to its ARM Architecture

  • It will allow India to build capability with its associated “bargaining power”

  • Will provide technological sovereignty and immunity from possible export restrictions to India in future. The Missile Technology Control Regime (MTCR) of the 1980s, practiced by the US and its partner nations which saw India denied access to US supercomputers, has taught India a lesson in self-reliance

  • The processor can claim to be 100%  “Designed and Engineered in India”

  • It will eliminate the dangers of “Security Back doors” – surreptitious links back to  the foreign supplier  and thus allow the products to be deployed in strategic applications.

  • Chips ready for manufacture

    In a related development, the  Thiruvananthapuram  centre of C-DAC,  has on 5 May, invited expression of interest for the  Licensing of Processor, System and Peripheral intellectual property that it has developed for a  a series of Single, Dual and Quad Core Processors under the brand “VEGA Processors”.

    C-DAC has successfully completed the development of the VEGA series of microprocessors in software form comprising 32-bit and 64-bit  single, dual and quad core processors based on the Reduced Instruction Set or RISC-V standard.

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