Why OSAT, ATMP Is Important To A Fledgling Indian Semiconductor Industry

India’s first semiconductor fabrication unit is currently under construction in Dholera, Gujarat, with a second fab approved as part of the India-US semiconductor partnership. Furthermore, four cutting-edge chip assembly and testing plants are being established across the country.

These facilities, known in the industry as ATMP (Assembly, Testing, Marking, and Packaging) and OSAT (Outsourced Semiconductor Assembly and Testing), include three units being built in Sanand, Gujarat, and one in Morigaon, Assam.

Leading the charge is American semiconductor giant Micron Technology, which has committed $2.75 billion to build an OSAT facility in Sanand, with production slated to begin by mid-next year. In parallel, Tata Electronics has announced the establishment of a greenfield semiconductor assembly and testing facility in Jagiroad, Morigaon—the first of its kind in India’s North East. 

Earlier this year, C G Power, part of the Murugappa Group, said it would invest Rs 7,600 crore in a state-of-the-art OSAT facility in Sanand, in partnership with Japan’s Renesas Electronics Corporation and Thailand’s Stars Microelectronics. Most recently, in September, the Union Cabinet approved a proposal from Mysuru-based Kaynes Semicon to build an OSAT unit worth Rs 3,307 crore in Sanand, with a staggering daily capacity of 6.3 million chips.

Semiconductor Value Chain

Semiconductors—the world’s fourth-most-traded product—have perhaps the most complex and geographically dispersed value chain of any industry in the world. The production of semiconductors typically involves three key stages: design, fabrication, and assembly and testing.

Integrated device manufacturers (IDMs), like Intel, and fabless companies such as Qualcomm, Nvidia, and HiSilicon, collaborate closely with foundries that manufacture chips in their fabrication plants (fabs). Once fabricated, silicon wafers contain numerous small integrated circuits (dies) that must be cut, tested, and meticulously packaged.

The packaging of these wafers—whether in metal, plastic, ceramic, or glass—serves two key purposes: it connects the chips to their operational environments and protects them from chemical contamination and damage from heat, light, or physical impacts. 

The assembly, testing, and packaging (ATP) of semiconductors operates under two primary business models: one where IDMs and foundries handle the process in-house, and another where OSAT firms perform ATP services for third-party customers.

Despite its vital role, packaging has historically been undervalued compared to the front-end processes of design and wafer fabrication. This is largely due to two factors: it’s still possible to package wafers using old-generation equipment, and the competitive OSAT market is heavily driven by low labour costs rather than technological innovations.

Building a chip fabrication facility is a highly capital-intensive endeavour, often exceeding $15 billion due to advanced equipment and infrastructure costs. In contrast, semiconductor assembly is labour-intensive and typically offers lower profit margins, leading many companies to establish ATP operations in developing countries with lower labour costs.

As global competition intensifies for investment in the semiconductor industry, many countries are vying to attract these high-tech plants. In this context, India’s potential as a prime destination for ATP unit investment sparks crucial discussions about its long-term competitiveness and strategic value on the global stage.

Making A Mark

The chip packaging market is on the brink of substantial growth, driven by the semiconductor industry’s relentless push for miniaturization and efficiency. According to Mordor Intelligence, a market intelligence firm, the OSAT Market is estimated to reach USD 43.36 billion in 2024, and by 2029, it is projected to climb to USD 71.21 billion, growing at a robust CAGR of 8.62 per cent.

In terms of where ATP is actually conducted, Asia dominates the landscape, with an overwhelming 81 per cent of global packaging  activity concentrated in the region. China leads the pack with 38 per cent, closely followed by Taiwan at 37 per cent. 

As of November 2022, a total of 373 OSAT facilities were operational worldwide—111 in China and 107 in Taiwan. Meanwhile, the Americas, primarily the United States, hold just 46 facilities, making up a mere 3 per cent of the global market.

Overall, the OSAT market remains one of the less concentrated sectors within the semiconductor value chain, presenting significant opportunities for India to establish itself.

As Chris Miller, renowned author of Chip Wars, observed, “If you look at the way that Korea, Taiwan, and Singapore entered the chip industry, they entered with assembly, testing and packaging before moving to fabrication.” He continued, “There’s a lot of scope for India to win investments in that sphere, particularly because it’s right adjacent to the device assembly, smartphone assembly, and PC assembly, where India is also in the early stages of winning a lot of market share.”

While ATP is more labour-intensive than semiconductor manufacturing, labour costs only account for around 5 per cent of total production expenses. Interestingly, India’s labour costs are highly competitive with China’s, differing by merely $0.01 per hour, making India an attractive contender in this fast-growing market.

Moore’s Law Under Attack

Innovation is the lifeblood of the semiconductor sector, where “Moore’s Law” has held for decades. Coined by Intel co-founder Gordon Moore, the “law” (which technologically speaking refers to “process-node scaling”) represents the notion that the number of transistors on a microchip doubles approximately every two years, thereby doubling processing power while halving costs.

Moore’s prediction has proven remarkably prescient, but node advancement is now reaching its limits, giving rise to what is known as the “More than Moore” era.

As the industry reaches the physical limitations of transistor density and chip size, the cost of further compression is skyrocketing. Rather than continuing to cram more transistors onto a single chip, the future lies in advanced multichip packaging, which combines smaller, cost- and performance-optimized dies into a single package.

Introduced around the turn of the millennium, advanced packaging technologies such as 2.5-D, 3-D, fan-out, and system-on-a-chip (SoC) packaging are revolutionizing the industry, supplementing the legacy wire-bonding and flip-chip methods that have dominated for over half a century.

Today, advanced packaging constitutes about 8 per cent of the total semiconductor market, and by 2030, it is expected to more than double, surpassing $96 billion and outpacing the broader chip industry. While consumer electronics, particularly smartphones, currently dominate the demand for advanced packaging, the burst of activity in the AI segment will propel future growth. 

Countries that are leading the way in advanced packaging stand to gain significantly from the industry’s shift in value creation, moving from front-end processes to the more complex, high-value back-end operations. These nations stand to benefit the most as Generative AI (GenAI) applications—heavily dependent on advanced packaging technologies—evolve from novel innovations into dominant platforms in the coming years.

This imminent radical alteration of the traditional chip manufacturing cycle presents a strategic opportunity for India to invest in the field of advanced packaging. Subsidies for advanced multichip packaging are increasingly in vogue as governments try to attract, retain, and support technology innovation in chipmaking.

Kaynes Technology’s OSAT unit in Sanand is an example of this shift, focusing on advanced packaging techniques in co-packaged optics (CPO) in the area of silicon photonics, alongside wire-bond and substrate technologies.

To fully harness this potential, India must bolster its appeal to key industry players, building on the government's existing 50 per cent capital expenditure subsidy for OSAT units.

Lessons From Micron’s ATP Investment

In June 2023, India’s efforts to expand its footprint in the semiconductor manufacturing ecosystem took a major leap forward when memory chip giant Micron announced plans to construct a first-of-its-kind memory chip (DRAM and NAND) assembly and test facility in Sanand.

DRAM chips provide temporary data storage during processing—like the 4GB found in an iPhone 11, or the 4,866,048GB used by today’s fastest supercomputers. NAND flash memory, on the other hand, serves as long-term storage for most computing devices - the modern version of hard disk drive.

This facility will focus on transforming semiconductor wafers into ball grid array (BGA) integrated circuit packages, memory modules, and solid-state drives, creating up to 5,000 new direct Micron jobs and 15,000 community jobs over the coming years. Construction commenced in September 2023, with the first phase set to be operational by late 2024, and the second phase expected to come online in the latter half of the decade.

Analysts view Micron’s investment as a major catalyst for India’s semiconductor ambitions. Indeed, after Micron announced its investment, the Centre has approved two fabrication proposals along with three additional ATP project proposals. 

Given India's expanding consumer and business marketplace, coupled with its strengths in electronics production and the ongoing global supply chain rebalancing, the country is well-positioned to seize this moment and enhance its role in global semiconductor value chains. 

In the next five years, India has the potential to significantly expand its presence in the semiconductor assembly, testing, and packaging segment, and attract fabs producing legacy semiconductors at 28 nm or above.