Samsung Announces That It Has Started Chip Production Using 3nm Process Technology With GAA Architecture
The report mentioned how transistor structure is yet again expected to change from FINFET to Gate-All-Around (GAAFET) architecture, starting with Samsung's 3nm process technology.
On 1 June this year, Swarajya had published a report titled "As Chips With 3nm Node Start Trickling In, Here Is A Quick Look At Transistor Shrinking Plan For The Next 15 Years" in which it was also mentioned that "Samsung is expected to deliver a 3 nanometer (3nm) process node in the first half of 2022, TSMC in the second half."
The report also had mention of how transistor structure is yet again expected to change from FINFET to Gate-All-Around (GAAFET) architecture starting with Samsung's 3nm, though TSMC is expected to stay with FINFET for its 3nm offering.
Today, on 30th of June which is technically the last day of "first half of 2022", Samsung announced that that it has started initial production of its 3-nanometer (nm) process node applying Gate-All-Around (GAA) transistor architecture.
As per the announcement, Multi-Bridge-Channel FET (MBCFET™), Samsung’s GAA technology implemented for the first time ever, defies the performance limitations of FinFET, improving power efficiency by reducing the supply voltage level, while also enhancing performance by increasing drive current capability.
“Samsung has grown rapidly as we continue to demonstrate leadership in applying next-generation technologies to manufacturing, such as foundry industry’s first High-K Metal Gate, FinFET, as well as EUV. We seek to continue this leadership with the world’s first 3nm process with the MBCFET™,” said Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics.
“We will continue active innovation in competitive technology development and build processes that help expedite achieving maturity of technology,” he added.
Samsung claims that the design flexibility of GAA is highly advantageous for Design Technology Co-Optimization (DTCO), which helps boost Power, Performance, Area (PPA) benefits.
Compared to 5nm process, the first-generation 3nm process can reduce power consumption by up to 45 per cent, improve performance by 23 per cent and reduce area by 16 per cent compared to 5nm, while the second-generation 3nm process is to reduce power consumption by up to 50 per cent, improve performance by 30 per cent and reduce area by 35 per cent.
This may not be the first time that Samsung has announced new technology node for transistors ahead of foundry leader TSMC. In early 2019, Samsung had announced completion of development of 5nm and had said that "it has offered 5nm (5LPE) process design kit (PDK), design methodologies (DM), electronic design automation (EDA) tools, and IP, to its customers since the Q4 of 2018".
TSMC is said to have started risk production of 5nm around the same time. On its website, it says "TSMC’s 5nm (N5) Fin Field-Effect Transistor (FinFET) technology successfully entered volume production in the second quarter of 2020 and experienced a strong ramp in the second half of 2020."
Samsung however, has reportedly not been able to get the yields for its 5nm chips (and the slightly modified 4nm version) to be comparable to TSMC. As per this report in a South Korean medium: "In 4- and 5-nanometer chips, the company achieved disappointing yields, with some estimates placing their yields as lower than those for competing products from TSMC, the leader in custom chip manufacturing."
"Samsung Electronics has also been having trouble with the performance of phones with the Exynos 2200, which uses 4-nanometer technology. Processing speeds of Galaxy S22s fitted with the chip are lower for iPhone 13s and even the preceding 12 series using TSMC’s 5-nanometer technology," the report added.
The report also said: "Earlier reports said that Samsung Electronics had achieved yields of around 10 per cent for 3-nanometer chips, though the 30 per cent range has since been mentioned in the local press. Samsung Electronics declined to comment about the issues and does not normally disclose its chip yields. The Korean tech company is trying to get beyond its image of being a secondary player in the foundry business with the release of 3-nanometer chips ahead of others"
It will be interesting to see if being the first to announce 3nm will give Samsung the edge or will yield issues again make it struggle.
Apart from not being able to go beyond the 16-18 per cent market share over the last few years and the gap with TSMC widening even further as per the 1Q2022 foundry results, Samsung may soon face challenge from Intel Foundry Services who is expected to catch up on advanced technology nodes soon and offer it for contract chip manufacturing compared to using them only for its own products as was the case with Intel in the past.
Doing GAA architecture ahead of others is a risk that Samsung is taking, but if it succeeds, it may not only be able to get back to giving tougher competition to TSMC (and an upcoming Intel Foundry Services) but the learning from 3nm GAA yield improvement may be an advantage at 2nm (expected in 2024) when TSMC and Intel too will adopt GAA architecture for transistors.
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