A full month has gone by since the government of India formally sought applications for silicon and display fabs as part of its $10 billion incentive package for creating a semiconductor ecosystem. The website acts as the single window where notification, detailed guidelines and application processes are listed.
Swarajya has been tracking global developments in the semiconductor space extensively and has also been giving in depth analysis on various aspects of what may work for India, occasionally also interviewing industry leaders who may play a vital role in the months and years to come.
In this article, we take a closer look at how the $10 billion overlay may play out, who may be some of the potential applicants and what more the government of India may need to do- caveat emptor, the numbers here are speculative, back-of-the-envelope kind of calculations, intended to drive some points.
Below is a summary of the four different 'bucket' of efforts that the incentives are intended for, a brief summary of their eligibility criteria and the fiscal support that the government has so far promised - for details, interested parties are requested to go through the policy related documents.
Going by the press meet and interviews given by Cabinet Minister Ashwini Vaishnaw or Minister of State Rajeev Chandrashekhar, the aim is to support about 100 companies for design, 15-20 in the bucket of compound/siliconphotonics/sensor fabs or OSAT/ATMP, at least two display fabs and two Silicon CMOS fabs.
For beginners, OSAT stands for Outsourced Semiconductor Assembly and Testing and ATMP for Assembly Testing Marking and Packaging - a recent interview of the CEO of Tata Electronics (OSAT division) Sri Raja Manickam published in Swarajya will be a good read.
The ceilings of Rs 15 crore and Rs 30 crore for each design company makes it a total overlay or about 4,500 crore ($0.6 billion), there are also related efforts like chips2startup and if one assumes that some money may go for that, over all there may be close to $0.8 billion expense for the government.
The bucket of compound/Silicon-Photonics/sensor fabs and OSAT does not seem to have a ceiling in terms of capex eligible for 30 per cent incentive. Given that it is a diverse set of options and the fact that it is open for three years to apply, it is not easy to put a number for how much overlay may go for this.
Nevertheless, going by the $300 million that has been in the news for what Tata electronics may invest for an OSAT unit and taking some numbers from this detailed analysis of China's efforts to grow in the compound semiconductor fab space, even a low end mix of 15 companies may need at least $2.5 billion from the government.
For the display fabs, since there is a ceiling, for two units, the overlay needed can be capped at Rs 24,000 crore or $3.2 billion. Adding all of the estimated numbers so far, we get a total of $6.5 billion already, which leaves 'only' about $3.5 billion for the Crème de la crème that is Silicon CMOS fabs.
The government has tried to grade this incentive by process node-up to 50 per cent fiscal support for fabs (foundries) that run 28-nanometre (nm) or below, up to 40 per cent for fabs that run above 28nm but 45nm or below, and up to 30 per cent for fabs that run above 45nm but 65nm or below.
Even if the government were hoping that it can fund say $0.9 billion of a $3 billion 65nm fab and $3.5 billion of a $7 billion cost 28nm fab, the total adds up to $4.4 billion, which is nearly a billion more needed than what we just estimated as the potential pie remaining after funding other initiatives of the scheme.
Indeed, these are mostly guesses, the mix of how much for each initiative can vary depending on the kind of applications the government receives and there is even scope of increasing the overlay - there are reports of the MEITY Secretary Saurabh Gaur saying "government is willing to take that up to $40-$50 billion when necessary".
Meanwhile the "gradation" has not gone down well with some - Ajay Jalan of Next Orbit Venture whose group is one of the few who have so far publicly and clearly stated their plans of a 65nm Analog fab in Gujarat partnering with Tower semiconductors of Israel, aired his concerns in an article published in Economic Times.
Just before and after the policy announcement that happened on 15 December 2021, there were many speculative articles in media that India - government as facilitator or business houses - is in talks with the likes of TSMC, Samsung, Intel, UMC or GlobalFoundries, likely for a 28 or 22nm technology transfer or joint venture.
However, for the last one month, there has been silence even in the media about these players applying for #FabInIndia. Most if not all major companies, while announcing their last year results, have also given indications about upcoming investment plans, and so far, India plans have not been mentioned by any of them.
Indeed there is a possibility that many of the companies may not want to publicly reveal their efforts until it is formally approved by the government of India - however, in a worst case scenario it is also likely that many of the big players are still playing a waiting game about how things pan out in other countries.
The EU for example is expected to publish "Chips Act proposals" on 8 February. The US policy makers are still discussing their final plans. Meanwhile more countries continue to express their desire to jump into the bandwagon, the latest being Turkey.
A recent article in Nikkei Asia indicates Vedenta group is exploring possibilities for what could be a 28nm fab at first and later even the possibility of a 10nm or 16nm fab. The group has just opened a position for CEO. While we look forward to some good news, it is not clear if/when a partnership or technology transfer may work out.
One of the top five companies listed earlier is believed to have told a potential partner that let the 65nm Analog fab take off first and once India proves its capability, they will look at the possibility of a 28nm or comparable fab in India. For a beginner like India, it may be advisable to be practical than being idealistic.
The India Semiconductor Mission is expected to play a proactive role for these efforts, however it is still in the process of being set up with recent announcements of positions for CEO, CTO and CFO and whoever joins in those position, unless already fully plugged in, will need time to get up to speed with details.
In the interim, if indeed there are no indications of anyone from top-5 applying before 15 February, here are a few things the government can do:
1. For those who do apply by 15 February, address their concerns immediately- for example, the clause on gradation of incentives based on process nodes.
2. The ministers could confirm that there are indeed plans to increase the overlay for the incentives to $40-$50 billion in future as the need arises.
3. Nothing succeeds like success, so good application(s) received by 15 February should be fast tracked for negotiations and approval.
4. After approval and ground breaking of at least one Silicon CMOS fab, re-open the scheme in another window
Arun Mampazhy has a BTech from IITM and MS from University of Maryland in semiconductor fabrication and over a decade of industry experience. His dreams of seeing a commercial fab takeoff in India has changed from black and white to colour over two decades. He can be reached via email nanoarun(at)gmail(dot)com or @nano_arun on twitter. Views expressed are personal.
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