RISC-V: An Open-Source Churn In Computational Hardware Electronics – Part 2

by Dr Santhosh Onkar - Dec 5, 2022 11:45 AM +05:30 IST
RISC-V: An Open-Source Churn In Computational Hardware Electronics – Part 2The DIRV logo.
  • Toiling legwork, dynamic long-term roadmap and laser focus are a must if India has to emerge as a serious player beyond continuing to remain a mere labour pool.

The previous article was a ‘look back’ at the computation paradigm and the context in which RISC-V has emerged as a new player.

In this article, we ‘look sideways’ and in the future we will attempt to ‘look ahead’ in the Indian context.

RISC-V — The evolving Business Model

Even though RISC-V ISA is an open standard it doesn’t define the micro-architecture of implementation or the business model, hence a RISC-V based micro-architecture developed by any commercial entity can still be licensed either as a commercial IP or as an open-source offering.

Alternatively, if one obtains a normal licence (paying a hefty fee) to a commercial processor IP vendor (for example, ARM), one gets a bundled right to use vendor’s ISA and micro-architecture with no right to modify the deliverables.

However, RISC-V has room for implementing custom micro-architecture using modular ISA for various applications ranging from a tiny IoT (Internet of Things) device to a server-class exascale processor.

The modularised ISA (integer, floating-point, compressed, vector, etc) provides flexibility to include extensions that are fine-tuned to a targeted application.

RISC-V is levelling the playing field for potential new players, leveraging the open-source community adding value and selling the end-result as open-source IP or a commercial IP.

RISC-V is also enabling existing players in vertical integration. This disruption has drawn a lot of interest and exploration primarily in IoT, embedded accelerators and AI (artificial intelligence) markets.

Since the whole RISC-V ecosystem is in its early days, there is good potential for many breakthroughs and commercialisation opportunities in the entire chip development value chain ranging from IP design to qualification, micro-architecture implementation, verification, physical implementation, software-stack development and deployment, system prototyping and validation, EDA software and services.

All these aspects need potential players to bring RISC-V products to market. Let’s look at some of the pioneers that have taken the lead to monetise their efforts.

Key Global Players And strategies

Deloitte estimated that RISC-V ventures have already garnered close to $21 billion in investments in the last three years from 2020-2022 compared to the same amount disbursed in over a decade (2005-2016). SiFive is a US-based first commercial venture spun out in 2010, by the researchers who invented RISC-V architecture at UC-Berkeley.

The company’s business model is to sell customised, configurable RISC-V core micro-architecture IP implemented for a domain-specific System on Chip (SoC) design.

Currently, the company is valued at $2.5 billion with the latest partnership announcement with Intel, to use Intel’s Foundry Services (IFS) to build RISC-V IPs optimised on Intel’s process technology and made available to IFS customers.

The second most prominent driver is Andes Technology Corporation — a Taiwanese company which started with proprietary MCU cores (V3 series). It has recently pivoted to RISC-V (RV series) garnering close to 60 licences with two-thirds of these customers in mainland China and Taiwan with 50 per cent customers working on AI applications.

The third noteworthy initiative was by Western Digital, which leveraged the open-source community in implementing the SweRV core for their flash memory controllers showing excellent power and throughput numbers.

Recently, this team tied up with Cadence Systems (leading US-EDA and IP provider) and some of these SweRV cores will soon become commercial offerings of Cadence IP portfolio.

The other important players worth noting are Esperanto Technologies, developing chips using RISC-V aiming for TeraFlop level computations targeting AI and machine learning applications.

Codasip in addition to various RISC-V core IPs is also offering EDA software for developing processors. GigaDevice Semiconductor — a Beijing-based company claimed to have made the world's first RISC-V based general-purpose MCU has been encouraging its customers (mostly Chinese) to adopt RISC-V MCUs.

MachineWare is another interesting German startup in stealth mode based out of Achen that is offering high-speed RISC-V simulators which can enable software developers to test full software stacks including firmware, OS kernel and application environments in real time.

Rivos Inc in the US is a recent entrant still in stealth mode with some high-profile founders targeting high performance RISC-V cores.

NSI-TEXE — a Japanese startup backed by DENSO — is targeting ASIL-D qualified RISC-V cores for automotive applications. DinoplusAI in China is developing data centre, 5G applications starting from SiFive’s IP.

Another Chinese company, Huami Technology’s Huanshan No 1 product, is aimed at the wearable device market.

Alibaba Group’s Pintouge Semiconductor and CEVA build AI, Wi-Fi for Alibaba Cloud and autonomous driving applications using RISC-V. Cortus in France has a range of RISC-V products aiming at aerospace industries.

Faraday Technology from Taiwan has a RISC-V ASIC implemented in 55nm at UMC available for mass production. This is by no means a comprehensive list but enough to demonstrate the frenzied activity in this space.

First Commercial Products And Fab Support

A number of RISC-V products targeting various applications have already made it to the market, a few notable ones are: Pixilica and Espressif. They are US-based providers of embedded technologies for hobbyists. Pixilica has licensed SiFive’s series 2 IP to produce an embedded development board for IoT applications and GPU cores are in the pipeline.

Canaan developed the Kendryte K210 in China and has been used by many Chinese product developers for ex-Seeed Studio for ‘Raspberry Pi’-like solution, M5STACK and DFRobot for AI-based Camera. Huami — a Xiaomi subsidiary in China included a RISC-V based SoC in their Amazfit Health Watch.

GreenWaves — French company has released GAP8 RISC-V processor for AI in IoT devices. Renesas has released the RZ/Five family of microprocessors based on RISC-V. Microchip has released an FPGA including RISC-V starting with the Mi-V product line.

Most of these above mentioned chips are fabricated in TSMC using 180nm (SiFive), 55nm (GAP8) and 28nm (K210), but the rest of the foundries are following suit with Globalfoundries, Samsung, and X-Fab actively offering wafer lots for RISC-V products.

Growing Global Academic And Research Interest

RISC-V cores have been active in academia starting from UC-Berkeley which has many variants hosted on github (ex, Rocket, BOOM, Sodor).

RIOS Lab (a joint effort of Tsinghua-Berkeley Shenzhen Institute) is pioneering the RISC-V ecosystem in China, enabling T-Head Semiconductor — subsidiary of Alibaba Group to release their XuanTie 9 core to the open-source community.

Fraunhofer Group in Germany has EMSA5-FS collaborating with Swedish software provider IAR to establish a toolchain to enable certification of RISC-V products to meet functional safety requirements of the automotive market.

ETH Zurich and University of Bologna will present an AI accelerator based on RISC-V at ISSCC 2023.

CINECA, the supercomputing centre in Italy in collaboration with University of Bologna is building a RISC-V based supercomputer.

In September 2022, NASA announced that its next-generation High-Performance Spaceflight Computing (HPSC) processor will be based on RISC-V.

IIT-Madras in India under name Shakti, has taped-out RISC-V cores using Intel’s 22nm process technology in 2018 and CDAC is building VEGA series processor variants using RISC-V.

Barcelona Supercomputing Center (BSC) has teamed up with Intel to build zettascale supercomputers using RISC-V. European Processor Initiative (EPI) under Horizon 2020 is also exploring RISC-V for space applications.

Geopolitics And Dragon Embrace Of RISC-V

In the ongoing silicon spat between the US and China, the US government has imposed import/export constraints on several US-based technology companies vis-a-vis China pertaining to the semiconductor industry.

Amidst these mounting restrictions on access to foreign technology, China has embraced RISC-V (which is independent from any country or a proprietary firm) to onshore the vital know-how of processors for its sovereign needs.

The latest imposition by the US government on China and Russia was on the sale of high-end GPUs used in supercomputers and AI.

The renaming of RISC-V Foundation to RISC-V International (governing body of RISC-V standards) and shifting of its headquarters from the US to Switzerland should be seen in the back-drop of this tussle.

The open RISC-V is emerging as an important component in supply chain, security and technological necessities of sovereign nations.

Many national semiconductor strategy doctrines are including RISC-V in their policy frameworks namely: European Chips Act including European Processor Initiative, Thales in France, which is a major French Defense and Aerospace contractor handling many EU and French projects, is working on developing the RISC-V platform ready for first pilot-projects this year.

The Russian initiative led by Rostec and Yadro and recently, India’s Digital India RISC-V (DIR-V) program. Among these initiatives, China has taken a sizable lead and shown real intent to pursue RISC-V in mission-mode in comparison to others (read India).

Two initiatives need special mention, first is the setup of The China Open Command Ecosystem (RISC-V) Alliance (CRVA) bringing together institutions, research communities and companies under the leadership of Institute of Computing Technologies (ICT) of the Chinese Academy of Science (CAS).

ICT-CAS is instrumental in popularising RISC-V in China by the Chinese graduates who returned from Berkeley. ICT-CAS is a founding member of RISC-V Foundation (now RISC-V International) with later infusion of many Chinese companies and research institutes with premium membership like Alibaba, Huawei, ZTE, UNISOC, RIOS Lab, etc.

As of 2022, these Chinese players hold almost majority seats on the board of directors at RISC-V international and numerous other positions in technical steering committees.

These positions will be crucial in directing standards, extensions, roadmap and technical programs to best serve their future needs.

Second is the formation of the China RISC-V Industry Consortium (CRVIC) led by VeriSilicon with the backing of Shanghai and Shenzhen authorities resulting in the emergence of Nuclei System Technology, StarFive, Huami and RiVAI startups.

It is evident that China has learnt from its earlier attempts of national processors like Loongson using MIPS and Sunway processors in the early 2000s, the result of this can be seen in the rapid deployment of RISC-V processors in entry-level microcontrollers for IoT and Industrial applications.

GigaDevice and Huami have been instrumental in achieving this feat. Another notable example is the Kylin Linux distribution development using the RISC-V platform approved by the Chinese Military.

In comparison, India has mostly indulged in pomp and pageantry at public events instead of technology focused long term actions with tangible outcomes that involve working the value-chain and doing the needed background research and in-house due diligence.

The invitation and sharing stage with actors of Pakistan-China Silicon collaboration by Ministry of Electronics and Information Technology officials is one such example of this lack of due diligence. India would be naive to employ swords and shields accompanied by bravado in a gun battle.

Toiling legwork, dynamic long-term roadmap and laser focus are a must if India has to emerge as a serious player beyond continuing to remain a mere labour pool.

In the next part we’ll take stock of the Indian RISC-V ecosystem and some of the promising bright spots so far in this endeavour.

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